2004


Papers

  1. Kazuhisa Ishizaka, Takamichi Miyamoto, Jun Shirako, Motoki Obata, Keiji Kimura, and Hironori Kasahara, ``Performance of OSCAR Multigrain Parallelizing Compiler on SMP Servers'', Proc. of 17th International Workshop on Languages and Compilers for Parallel Computing(LCPC2004), Sep., 2004. (pdf)
  2. Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara, ``Cache Optimization among Coarse Grain Tasks using Intra-Array Pading'', Trans. of IPSJ, Vol. 45, No. 4, Apr., 2004. (pdf)
  3. Jun shirako, Kouhei Nagasawa, Kazuhisa Ishizaka, Motoki Obata, Hironori Kasahara, ``Selective Inline Expansion for Improvement of Multi Grain Parallelism'', Trans. of IPSJ, Vol. 45, No. 5, 1345-1356, May, 2004. (pdf)
  4. Keiji Kimura, Yasutaka Wada, Hirofumi Nakano, Takeshi Kodaka, Jun Shirako, Kazuhisa Ishizaka, Hironori Kasahara, ``Multigrain Parallel Processing on Compiler Cooperative Chip Multiprocessor'', Proc. of 9th Workshop on Interaction between Compilers and Computer Architectures (INTERACT-9), Feb., 2005 (pdf)

Invited Talks

  1. H. Kasahara, "150th ARC memorial special technical meeting(2), Panel: Future of Computer Architecture Research 'Development of high-value added Chip Multiprocessors by industry-government-academia collaboration'", 150th IPSJ Special Interest Group on Computer Architecture, May. 2004.
  2. H. Kasahara, "Developing World Fastest Compiler: Advanced Parallelizing Compiler Project", IBM Life Science Amagi Seminar, Sep. 2004.
  3. H. Kasahara, "Current and Future of Automatic Parallelizing Compilers", The 19th NEC HPC Forum, Nov. 2004. 

Technical Reports

  1. Yasutaka Wada, Jun Shirako, Kazuhisa Ishizaka, Keiji Kimura, Hironori Kasahara, ''Evaluation of Multigrain Parallelism on OSCAR Chip Multi Processor'', Technical Report of IPSJ, 2004-ARC-159-11, Jul., 2004. (pdf)
  2. Hirofumi Nakano, Yosuke Naito, Takahisa Suzuki, Takeshi Kodaka, Kazuhisa Ishizaka, Keiji Kimura, Hironori Kasahara, ``Data Localization using Data Transfer Unit on OSCAR Chip Multiprocessor'', Technical Report of IPSJ, 2004-ARC-159-20, Jul., 2004. (pdf)
  3. Takeshi Kodaka, Hirofumi Nakano, Keiji Kimura, Hironori Kasahara, ``Parallel Processing for MPEG2 Encoding on OSCAR Chip Multiprocessor'', Technical Report of IPSJ, 2004-ARC-160-07, Dec., 2004. (pdf)
  4. Akira Kuroda, Keiji Kimura, Hironori Kasahara, ``Performance Evaluation of Electronic Circuit Simulation Using Code Generation Method without Array Indirect Access'', Technical Report of IPSJ, ARC2005-161-1 (SHINING2005), Jan., 2005 (pdf)
  5. Jun Shirako, Takamichi Miyamoto, Kazuhisa Ishizaka, Motoki Obata, Keiji Kimura, Hironori Kasahara, ``Performance of OSCAR Multigrain Parallelizing Compiler on Shared Memory Multiprocessor Serers'', Technical Report of IPSJ, ARC2004-161-5, Dec., 2004 (pdf)
  6. Takanari Matsuzawa, Shinya Sakaida, Takao Tobita, Hironori Kasahara, ``Performance Evaluation of Minimum Execution Time Multiprocessor Scheduling Algorithms using Standard Task Graph Set Which Takes into Account Parallelism of Task Graphs'', Technical Report of IPSJ, ARC2004-161-9, Dec., 2004 (pdf)

Academic Exhibition

  1. Takeshi Kodaka, ``MPEG2 Encoding considering Data Localization on OSCAR Chip Multiprocessor'', STARC Symposium 2004, Sep., 2004.
  2. Yasutaka Wada, Jun Shirako, Takamichi Miyamoto, Hirofumi Nakano, Takeshi Kodaka, Kazuhisa Ishizaka, Keiji Kimura, Hironori Kasahara, ''Multigrain Parallel Processing on Chip Multiprocessor'', EDS Fair 2005, Jan., 2005.

News Papers

  1. Nihon Keizai Shimbun, "Cooperative Research and Development by Hitachi and Waseda Univ.", Oct. 01. 2004.
  2. Nikkan Kogyo Shimbun, "Framework Agreement between Hitachi and Waseda Univ. --Having its beginning with research and development of Multi-core Processor", Oct. 01. 2004.
  3. FujiSankei Business i, "Framework Agreement on Industry-University Cooperation", Oct. 01. 2004.
  4. Dempa Shimbun, "Framework cooperation between Hitachi and Waseda Univ. --Promotion of Exchange in Many Fields, Human Resource, Technology and Information.", Oct. 01. 2004.
  5. Kensetsutsushin Shimbun, "Comprehensive Cooperation between Waseda Univ. and Hitachi, in the Fields of Research and Education ", Oct. 01. 2004.
  6. Shinano Maihichi Shimbun, "Unique Industry-University Cooperation between Hitachi and Waseda Univ. Expatriate employees Give Their Practical Business know-how to Students in English.", Oct. 01. 2004.
  7. Nikkei Sangyo Shimbun, "Upbringing of Human Resources by Collaboration of Industry and Academia", Apr. 21. 2004.

Articles

  1. Mycom PC Web, "Current and Future of Automatic Parallelizing Compilers", Nov. 11. 2004. (Headline)
  2. Nikkei Electronics Vol.8, pp.97-121, 2004, "Toward Multi-core Processors from Single-core.", Aug. 30. 2004.
  3. Nikkei Shingaku Guide, "Assistant professors are engineers of the first class   Education in industry-university cooperation", 2004
  4. Nikkei Microdevices Special Edition 2004 (Reader for Jobhunting in Semiconductor Industry ), "Development of Single Chip Multicore Architecture", 2004

Web News

  1. Cosy 2004 Announcement "Japanese Universities and Research Institutes Embrace Cosy. Waseda University and Tokyo University enter into advanced compiler research with compiler development system from ACE", Nov. 17. 2004.
  2. Nikkeibp.jp for Technology & Business, "Framework Agreement on Industry-University Cooperation between Hitachi and Waseda Univ. Promoting Development of  Semiconductor, Robot and so on, as an Important Pillar.", Sep. 30. 2004. 
  3. Tech On!, "Framework Agreement on Industry-University Cooperation between Hitachi and Waseda Univ. Starting Their Cooperative Research and Development of  Multi-core Microprocessor as Their First Shot", Sep. 30. 2004. 
  4. Nikkei Net IT Business & News  , "Development of Speeding up and Power Saving Multi-core processor for Mobile Phone, Hitachi and Waseda Univ.", Oct. 01. 2004.

Press Release

  1. Waseda University Press Release, "Waseda University and Hitachi Group concluded an agreement for Comprehensive Academic Industrial Collaboration to start comprehensive cooperation", Sep. 30. 2004 

Patents

 Published applications for patent

  1. "COMPILE METHOD, COMPILER AND COMPILE DEVICE", 2004-252728 (JP Publication), Sep. 09. 2004. 【Registration of patent:4177681 (JP Patent), Aug. 29. 2008.】

Awards

  1. Hironori Kasahara, “STARC (Semiconductor Technology Academic Research Center) Industry-Academia Cooperative Research Award”, Jan 23, 2005.
  2. Takeshi Kodaka(Research Associate), "STARC Symposium Presentation Special Award" , Jan 23, 2005.